# SPDX-License-Identifier: Apache-2.0
# Copyright 2019 Western Digital Corporation or its affiliates.
# 
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
# 
# http://www.apache.org/licenses/LICENSE-2.0
# 
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.



#Simple start up file for the reference design

#ifdef D_LLVM_COMRV
/* disable warning for reserved registers use - we are using comrv
   reserved register and don't want to see these warnings. */
.option nowarnreservedreg
#endif /* __clang__ */

.section ".text.init"
.global _start
.type   _start, @function




_start:
    #clear minstret
    csrw minstret, zero
    csrw minstreth, zero

    #clear registers
    li  x1, 0
    li  x2, 0
    li  x3, 0
    li  x4, 0
    li  x5, 0
    li  x6, 0
    li  x7, 0
    li  x8, 0
    li  x9, 0
    li  x10,0
    li  x11,0
    li  x12,0
    li  x13,0
    li  x14,0
    li  x15,0
    li  x16,0
    li  x17,0
    li  x18,0
    li  x19,0
    li  x20,0
    li  x21,0
    li  x22,0
    li  x23,0
    li  x24,0
    li  x25,0
    li  x26,0
    li  x27,0
    li  x28,0
    li  x29,0
    li  x30,0
    li  x31,0

    # initialize global pointer
    .option push
    .option norelax
    la gp, __global_pointer$
    .option pop

    # check number of harts (HW threads) in this core
    # read mhartnum (Total Number of Harts) CSR
    csrr t0, 0xfc4
    li   t1, 2
    # If only one hart in this core, then skip to hart0 initialization
    bne  t1, t0, hart0_init

    # check current hart
    csrr t0, mhartid
    beqz t0, hart0_init

    # hart1 init:
    # adjust hart1 stack pointer
    la sp, _sp_hart1
    # jump to main
    call main
    # loop here (not intended to arrive here)
1:  j 1b

    # from here, code is run only by hart0

hart0_init:
    #cache configuration
    li t1, 0x55555555
    #write to mrac (region access control) CSR
    csrw 0x7c0, t1
    fence.i
    # adjust hart0 stack pointer
    la sp, _sp_hart0

/*  [OS] we dont have this memory to load from ----
    // Load data section
    la a0, _data_lma
    la a1, _data
    la a2, _edata


    bgeu a1, a2, 2f
1:
    lw t0, (a0)
    sw t0, (a1)
    addi a0, a0, 4
    addi a1, a1, 4
    bltu a1, a2, 1b
2:
*/
    /* Clear bss section */
    la a0, __bss_start
    la a1, _end
    bgeu a0, a1, 2f

1:  sw zero, (a0)
    addi a0, a0, 4
    bltu a0, a1, 1b

2:  /* Call global constructors */
/*    la a0, __libc_fini_array
    call atexit */
    call __libc_init_array

    li a0, 0
    li a1, 0

    # activate hart1
    /*csrrwi x0, 0x7fc, 3*/
    # jump to main
    call main
    
    #[OS]: no need for exit, just endless loop here.....was: tail atexit
    # loop here
 2:  j 2b
